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Location: Villach, Austria

Employment Type: Full-time

Job Id: HRC1668058

Your Role

• Define the future generation power management IC architectures
• Conduct feasibility studies to ensure proof of concept
• Closely cooperate with cross-functional project members (marketing, application engineering, design, layout, lab and test engineers)
• Define the verification and validation strategy of your chips
• Provide guidance to the development teams

Your Profile

• University degree in Electrical Engineering, Microelectronics, Physics or comparable
• 6+ years of experience in integrated analog/mixed-signal design
• Good knowledge of analog/mixed-signal design flow (Cadence Virtuoso, AMS designer)
• Experience in the area of power applications is a plus (e.g. hot swap controllers, eFuses, microcontrollers, gate drivers, isolated DC-DC /AC-DC converters)
• Experience with SystemVerilog or other RTL languages as an advantage
• Fluent English skills with German skills or willingness to learn it as a plus

We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group I. The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills.

Contact: Franziska Mantei, LinkedIn